1C: voltage dividers LTSpice

from IPython.core.display import HTML
def set_width(width):
    display(HTML(f"""<style>  
            .container {{ width:{width}% !important; 
                            min-width:800px !important; margin: 0 auto}} 
            .jp-Cell {{ width:{width}% !important; 
                            min-width:800px !important; margin: 0 auto}} </style>"""))
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1C: voltage dividers LTSpice#

Learning goal: get introduced to the LTspice program, and design voltage dividers Structure + Timing of this experiment: BASIC = background, anticipate, simulate, implement & investigate, compare&conclude

  • 40 (20+20) min background+anticipate : per person. This is homework.

  • 40 (30+10) min simulate + implement & investigate : with partner (group of 2)

  • 15 min compare&conclude : with group of 4 (per table)

Background (homework): install LTSpice on your laptop#

⏳ Estimated time: 20 min

In this course we use LTSpice. LTspice is a circuit simulator made available by the company Linear Technology, which is part of Analog Devices now. It allows to quickly draw a schematic with general or specific components and simulate the circuits to perform DC, AC and transient analysis (=response to a step function). Simulation results are presented in a graphical way.

go to the LTSpice intro manual, to install and learn how to use it:

In this 1C manual we focus on DC analysis, the transient and AC analysis will be covered when working with resistors and capacitors at a later stage. .

Anticipate: Does the arrangement of voltage dividers influence the output voltage#

⏳ Estimated time: 20 min

In exercise 1A you measured a simple voltage, which can be used to define a Vout which is smaller than its Vin. In this exercise you will combine two voltage dividers, and determine whether arrangement of these two voltage dividers will affect Vout.

  • predict the \(\frac{Signal \, out}{Signal \, in}\) ratio for two individual voltage dividers, one with twice 10kΩ, the other one with 220Ω and 1kΩ

  • Calculate the ratio \(\frac{Signal \, out}{Signal \, in}\) for both the left and right voltage divider. Are they behaving the same?

You might want to watch the following movie clips on how to approach a resistor circuit, and how to work wih a current splitter.

### TO DO="your answer, Vout/Vin for the individual and combined voltage dividers"

Simulate: Use LTSpice to build the simulation#

⏳ Estimated time: 30 min

In LTSpice you will often use the top tool bar. Familiarize yourself with it, trough the intro LTSpice manual.

ℹ️ Hint
Your LTSpice scheme could already look similar to the following figure. For convenience you might want to use 1V as Vin (then the ratio Vout/Vin is easier to retrieve). You can use ctrl+c, ctrl+v for easy duplication.

Implement&Investigate (simulate) 1: Do the stacked voltage dividers behave the same?#

⏳ Estimated time: 10 min

Run the simulations you created in simulate and write down in the cell below which values you find for Vout? Also upload a screendump, in which both your circuit plus the simulated outcome are shown.

### TO DO=" your simulated Vout, for the 4 circuits"

from ipywidgets import FileUpload
from IPython.display import Image

upload=FileUpload()
upload

import os
#print(upload.value)
file_name="1C_1_all_R=1.jpg"
if upload.value!={}:
    with open(file_name,"wb") as f:
        try: f.write(upload.data[-1]) # python 3.7 Kernel code, not working on Vocareum
        except: f.write(upload.value[-1]["content"])  # python 3.8 Kernel code, not working on Vocareum

Image(filename=file_name, width="50%") 
#Image(os.path.abspath(file_name), width="50%")

Compare&conclude#

⏳ Estimated time: 15 min

  • Wait till all (4) group members finish their observation

  • Compare your results with your other group members.

  • If your results agree, and are in line with all predictions, then talk to a TA and get checked off

  • Otherwise, so if your results do not agree, or your results are not in line with your predictions, then first discuss amongst your group before getting a TA.

to be checked off by a TA:

  1. How/ why does the order of stacking matters?

  2. exit card:

    1. Write a brief abstract on what you learned (conclusion, useful graph),

    2. Which troubleshooting skills do you want to remember for next sessions,

    3. Which code do you copy for use in next sessions,

  3. How do you think this notebook could be improved

#1C LTSpice intro
### TO DO="1. why does stacking matter?"

### TO DO="2a. abstract"


### TO DO="2b. troubleshooting"


### TO DO="2c. code"


### TO DO="3. what changes would you suggest?"

If you got stuck during the measurement, at the end of the lab assignment we offer you a movie clip with our recorded efforts in the lab. If you were successfull with measuring, then skip this movie clip

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